coursera-comp-arch
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- File Size:5.30 GB
- Creat Time:2016-06-18
- Active Degree:333
- Last Active:2024-11-19
- File Tags:coursera comp arch
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File List:
- lectures/19-Small-Multiprocessors/Computer Architecture 18.4 L18S5 Cache Coherence Protocols (4900).mp4 255.89 MB
- lectures/11-Branch-Prediction/Computer Architecture 10.3 L10S4 Dynamic Outcome Prediction (2912).mp4 169.19 MB
- lectures/07-Superscalar3/Computer Architecture 6.2 L6S3 I2O1 Processors (2844).mp4 165.77 MB
- lectures/05-Superscalar1/Computer Architecture 4.0 L4S1 Classifying Caches (2807).mp4 163.55 MB
- lectures/14-Memory-Protection/Computer Architecture 13.2 L13S3 Page Based Memory Systems (2704).mp4 158.52 MB
- lectures/12-Advanced-Caches-1/Computer Architecture 11.5 L11S6 Prefetching (1234).mp4 152.44 MB
- lectures/08-Superscalar4/Computer Architecture 7.2 L7S3 Register Renaming with Pointers to IQ and ROB (2454).mp4 145.17 MB
- lectures/20-Multiprocessor-Interconnect-1/Computer Architecture 19.2 L19S3 Message Passing (2659).mp4 138.88 MB
- lectures/04-Cache-Review/Computer Architecture 3.4 L3S5 Motivation for Caches (2225).mp4 130.42 MB
- lectures/20-Multiprocessor-Interconnect-1/Computer Architecture 19.0 L19S1 More Cache Coherence Protocols (2116).mp4 122.45 MB
- lectures/17-Parallel-Programming-1/Computer Architecture 16.2 L16S3 Sequential Consistency (2100).mp4 121.89 MB
- lectures/17-Parallel-Programming-1/Computer Architecture 16.1 L16S2 Introduction to Parallelism (1759).mp4 104.00 MB
- lectures/01-Introduction/Computer Architecture 0.0 L00-S1Course Introduction.mp4 101.80 MB
- lectures/17-Parallel-Programming-1/Computer Architecture 16.0 L16S1 SMT Implementation (1719).mp4 101.73 MB
- lectures/19-Small-Multiprocessors/Computer Architecture 18.2 L18S3 Cache Coherence (1704).mp4 99.93 MB
- lectures/02-Instruction-Set-Architecture-Microcode/Computer Architecture 1.1 L1S2 Motivation (1640).mp4 97.32 MB
- lectures/03-Pipelining-Review/Computer Architecture 2.3 L2S4 Data Hazards (4633).mp4 95.16 MB
- lectures/03-Pipelining-Review/Computer Architecture 2.0 L2S1 Microcoded Microarchitecture (1408).mp4 83.83 MB
- lectures/10-VLIW2/Computer Architecture 9.1 L9S2 Review of Predication (3048).mp4 75.00 MB
- lectures/13-Advanced-Caches-2/Computer Architecture 12.1 L12S2 Software Memory Optimizations (1653).mp4 72.57 MB
- lectures/19-Small-Multiprocessors/Computer Architecture 18.1 L18S2 Bus Implementation (1211).mp4 70.93 MB
- lectures/08-Superscalar4/Computer Architecture 7.3 L7S4 Register Renaming with Values in IQ and ROB (1214).mp4 69.21 MB
- lectures/03-Pipelining-Review/Computer Architecture 2.1 L2S2 Pipeline Basics (3051).mp4 66.25 MB
- lectures/08-Superscalar4/Computer Architecture 7.1 L7S2 Register Renaming Introduction (1108).mp4 64.81 MB
- lectures/22-Large-Multiprocessors/Computer Architecture 21.5 L21S6 Scalability of Directory Coherence (1331).mp4 64.25 MB
- lectures/06-Superscalar3-and-Exceptions/Computer Architecture 5.3 L5S4 Introduction to Out-of-Order Processors (3053).mp4 63.41 MB
- lectures/16-Multithreading/Computer Architecture 15.4 L15S5 Course-Grain Multithreading (2616).mp4 61.29 MB
- lectures/12-Advanced-Caches-1/Computer Architecture 11.4 L11S5 Victim Caches (604).mp4 59.90 MB
- lectures/02-Instruction-Set-Architecture-Microcode/Computer Architecture 1.5 L1S6 ISA Characteristics (2547).mp4 59.41 MB
- lectures/06-Superscalar3-and-Exceptions/Computer Architecture 5.2 L5S3 Interrupts and Exceptions (2925).mp4 58.61 MB
- lectures/22-Large-Multiprocessors/Computer Architecture 21.4 L21S5 Implementation (2902).mp4 58.43 MB
- lectures/08-Superscalar4/Computer Architecture 7.4 L7S5 Memory Disambiguation (949).mp4 57.25 MB
- lectures/15-Vector-Processors-and-GPUs/Computer Architecture 14.1 L14S2 Cache and Memory Protection Interaction (2218).mp4 56.25 MB
- lectures/02-Instruction-Set-Architecture-Microcode/Computer Architecture 1.3 L1S4 Architecture and Microarchitecture (2337).mp4 54.10 MB
- lectures/12-Advanced-Caches-1/Computer Architecture 11.3 L11S4 Multilevel Caches (1737).mp4 54.05 MB
- lectures/18-Parallel-Programming-2/Computer Architecture 17.2 L17S3 Atomic Operations (2711).mp4 52.50 MB
- lectures/04-Cache-Review/Computer Architecture 3.3 L3S4 Memory Technologies (2247).mp4 51.71 MB
- lectures/10-VLIW2/Computer Architecture 9.3 L9S4 Speculation Execution (2602).mp4 50.32 MB
- lectures/10-VLIW2/Computer Architecture 9.5 L9S6 Case Study IA-64Itanium (2110).mp4 50.28 MB
- lectures/13-Advanced-Caches-2/Computer Architecture 12.0 L12S1 Multiporting and Banking (2008).mp4 49.76 MB
- lectures/21-Multiprocessor-Interconnect-2/Computer Architecture 20.4 L20S5 Routing and Flow Control (2027).mp4 49.16 MB
- lectures/04-Cache-Review/Computer Architecture 3.1 L3S2 Control Hazards Branch (2402).mp4 48.65 MB
- lectures/16-Multithreading/Computer Architecture 15.2 L15S3 GPUs (2002).mp4 46.25 MB
- lectures/15-Vector-Processors-and-GPUs/Computer Architecture 14.2 L14S3 Vector Processor Introduction (1804).mp4 45.62 MB
- lectures/09-VLIW1/Computer Architecture 8.1 L8S2 Introduction to VLIW (2157).mp4 43.26 MB
- lectures/13-Advanced-Caches-2/Computer Architecture 12.2 L12S3 Non-blocking Caches (1929).mp4 43.12 MB
- lectures/15-Vector-Processors-and-GPUs/Computer Architecture 14.4 L14S5 Vector Hardware Optimizations (1852).mp4 42.76 MB
- lectures/09-VLIW1/Computer Architecture 8.2 L8S3 VLIW Compiler Optimizations (2120).mp4 41.00 MB
- lectures/21-Multiprocessor-Interconnect-2/Computer Architecture 20.1 L20S2 Topology (1853).mp4 40.87 MB
- lectures/07-Superscalar3/Computer Architecture 6.1 L6S2 I2O2 Processors (1958).mp4 39.72 MB
coursera-comp-arch
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